AT9173 DATASHEET PDF

Moogujind An over-current trip cycles the soft-start function. N is the number of terminals. Include worst case component variations when determining phase margin. This pin is also monitored by the adaptive shootthrough protection circuitry to determine when the lower MOSFET has turned off. Shoot-Through Protection A shoot-through condition occurs when both the upper and lower MOSFETs are turned on simultaneously, effectively shorting the input voltage to ground.

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This method allows the VDDQ regulator to both source and sink current. Figure 1 shows how the individual regulators are affected by the S3 state at time t7. For reliable operation, select bulk capacitors with voltage and current ratings above the maximum input voltage and largest RMS current required by the ar I is the output inductor ripple current. It is important to note that the VTT rail may not bleed down to 0V.

The error amplifier reference is clamped to the internal digital soft-start voltage. I x ESR If the output voltage desired is 0. In high-current applications, the MOSFET power dissipation, package selection and heatsink are the dominant design factors. This method provides a rapid and controlled output voltage rise. Use copper filled polygons on the top and bottom circuit layers for the phase nodes.

In order to dissipate heat generated by the internal VTT LDO, the ground pad, pin 29, should be connected to the internal ground plane through at least four vias. Using the above guidelines should give a Compensation Gain similar to the curve plotted. The switching losses seen when sourcing current will be different from the switching losses seen when sinking current.

When attempting to restart a faulted regulator, the ISL will follow the preset start up sequencing. The output is user-adjustable by means of external resistors down to 0. The cascoded regulator will be disabled a the fault counter incremented by 1. The maximum rDS ON at the highest junction temperature. The maximum RMS current required by the regulator may be closely approximated through the following equation: Ensure that both MOSFETs are within their maximum junction temperature at high darasheet temperature by calculating the temperature rise according to package thermal-resistance specifications.

The minimum value for CSS can be found through the following equation: If a fault occurs prior to the Fault Reset Counter reaching a count ofthen the Fault Reset Counter is set back to zero.

The FB pin is also monitored for under and over-voltage events. Shoot-Through Protection A shoot-through condition occurs when both the upper and lower MOSFETs are turned on simultaneously, effectively shorting the input voltage to ground. Use the remaining printed circuit layers for small signal wiring. Under and Over-voltage Monitoring on All Outputs? The power dissipated in the linear regulator is: Each regulator is enabled and soft-started according to a preset sequence.

The supply to 5VSBY should be locally bypassed using a 0. Special sequencing of the input supplies is not necessary. This transition is represented on Figure 1 at time t Use only specialized low-ESR capacitors intended for switching-regulator applications a9t the bulk capacitors. If a regulator experiences any other fault condition an under-voltage or an overcurrent on VDDQthen that regulator, and only that regulator, will be disabled and an internal fault counter will be incremented by 1.

High frequency decoupling capacitors should be placed as close to the power pins of the load as physically possible. The amount of capacitance and type of capacitor should be chosen with this criteria in mind. This enables the ATX, which brings up the 12V rail. TOP Related Posts.

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AT9173 DATASHEET PDF

This method allows the VDDQ regulator to both source and sink current. Figure 1 shows how the individual regulators are affected by the S3 state at time t7. For reliable operation, select bulk capacitors with voltage and current ratings above the maximum input voltage and largest RMS current required by the ar I is the output inductor ripple current. It is important to note that the VTT rail may not bleed down to 0V. The error amplifier reference is clamped to the internal digital soft-start voltage.

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Tekus FB is the negative input to the voltage loop error amplifier. A kHz Synchronous Buck Regulator with a precision 0. This reset lasts for three soft start cycles, which is typically 24ms one soft start cycle is typically 8. The bulk filter capacitor values are generally determined by the ESR Effective Series Resistance and voltage rating requirements rather than actual capacitance requirements. If the Fault Reset Counter reaches a count of before another fault occurs, then the Fault Counter is cleared to 0. Do not insert any circuitry between this pin and the gate of the upper MOSFET, as it may interfere with the internal adaptive shoot-through protection circuitry and render it ineffective.

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